Event Detail
Session: 29:Bridging the Gap with Silicon
Type: Regular Session
Track: DFM and the Manufacturing Interface
Day:
Wednesday
Time: 2:00 PM - 4:00 PM
Room: 6F
Chair: Masanori Hashimoto - Osaka Univ.
29.1 Confidence Scalable Post-Silicon Statistical Delay Prediction under Process Variations, Q. Liu, S. Sapatnekar - Univ. of Minnesota
29.2 Statistical Framework for Technology-Model-Product Co-Design and Convergence, C. Cho, D. Kim, J. Kim, J. Plouchart, R. Trzcinski - IBM
29.3 Extraction of Statistical Timing Profiles Using Test Data, Y. Chen, J. Liou - Nat'l Tsing-Hua U.
29.4 An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires, K. Sundaresan - Sun Microsystems, Inc., N. Mahapatra - Michigan State Univ.
Abstract: Modeling and simulation tools in DFM and timing analysis have evolved considerably over the last several years, but relatively little has been done in closing the loop with actual Si measurements. This session aims to show how post-Si and environmental information can be leveraged to increase our pre-Si prediction accuracy and fine tune the design.