Event Detail
Session: 9:Circuit Simulation
Type: Regular Session
Track: Analog/Mixed-Signal/RF and Simulation
Day:
Tuesday
Time: 2:00 PM - 4:00 PM
Room: 6E
Chair: L. Miguel Silveira - INESC-ID
9.1 Interdependent Latch Setup/Hold Time Characterization via Euler-Newton Curve Tracing on State-Transition Equations., S. Srivastava, J. Roychowdhury - Univ. of Minnesota
9.2 PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels, Z. Wang, X. Lai, Jaijeet Roychowdhury - Univ. of Minnesota
9.3 Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis, A. Ramalingam, A. Singh - Univ. of Texas
9.4s Simulating Improbable Events, S. Yang, M. Greenstreet - Univ. of British Columbia
9.5s SBPOR:Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits, B. Yan, S. Tan, P. Liu - UC
Abstract: This session surveys numerous aspects of contemporary circuit simulation. Papers discuss characterization and analysis of latches, parameter variation in oscillators, a new waveform model for gate-level timing analysis, and progress in reduction of circuits formulated as second order systems.
