Event Detail
Title: 3rd Integrated Design Systems Workshop: Models for Design and Manufacturing - How Modeling Challenges are Touching Every Aspect of IC Design
Type: Workshop
Track: System Level and Embedded
Day:
Monday
Time: 12:00 PM - 5:00 PM
Room: 6A
Organizers: B. Bayer, S. DasGupta, N. English - Si2
Moderator: (panel) C. Visweswariah - IBM
Speakers: G. Delp - LSI, D. Hathaway - IBM, Bob Kezer - Intel, R. Aitken - ARM, C. Rowen - Tensilica, J. Spoto - Applied Wave Research, W. Ng - Chartered, A. Kahng - Blaze
Abstract: Rules-based design methods are rapidly being replaced by the need for models representing everything in modern chip design flows -- from the system-level analysis through foundry process variation. This workshop will bring together experts in important modeling areas such as: delay calculation, statistical timing, low power, DFM, yield, IP blocks, pcells etc. Speakers will first examine the necessity for model based design and how it is impacting design tools and flows, convergence/divergence issues, business implications and anticipated interactions between foundries, fabless design and EDA. They will then discuss significant research, development and cooperation across the industry, and debate whether it is sufficient and timely enough to meet the needs of coming technology nodes and what impacts can be expected on IC business models. Lunch is provided.
