DAC
 Exh S M Tu W Th F #
Event Detail
Title: Cadence - IBM Seminar: Optimizing the Path into ASIC for First-Time-Right Silicon
Type: Meeting
Day:  Thursday
Time: 7:30 AM - 9:00 AM
Room: 30CDE
Abstract: Learn the benefits of developing 65nm designs with low-power techniques.


Powered by Riskebiz
 Exh S M Tu W Th F #